2 days of debugging

Turns out that 0xaa (10101010) Only confirms correct endianness when your polarity is correct! It looks correct when inverted in time and voltage.

--- a/firmware/test4/fpga.c
+++ b/firmware/test4/fpga.c
@@ -46,11 +46,11 @@ void fpga_prog(uint8_t* block, uint8_t blen){
 //     IOE = block[0];
        if((fpga_state==READY) || (fpga_state==MIDPROG)){
                for(position=0;position<blen;position++){
-                       for(byte_pos=1 ; byte_pos!=0 ; byte_pos=byte_pos<<1){
+                       for(byte_pos=0x80 ; byte_pos!=0 ; byte_pos=byte_pos>>1){
                                if((block[position] & byte_pos)>0)
-                                       DILO();
-                               else{
                                        DIHI();
+                               else{
+                                       DILO();
                                }
                                bit_delay(10);
                                CLKHI(); /* min setup time 5ns so should be safe */

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