To cut a long and dull story short, I bought the parts for a new PC and have been trying to get it stable for about a month, so far….

Part of this saga was re-flashing the motherboard bios. It has a simple boot loader during POST to do this. The boot-loader called qflash gives a checksum for the binary file it has loaded. I could not find the expected value for this anywhere so filled in a technical support form and braced for the mysery.

Question – 844406
From : Tom [*********]
Sent : 11/30/2009 19:50
Question : When upgrading the bios, I was given a checksum by the qflash utility. I cannot find anywhere what the correct checksum is. Please can you confirm this value for f4 and f5 bios updates.
Many thanks

Answer – 844406
Answer : Hi,

Please ensure you have the correct BIOS update.

http://www.gigabyte.eu/Support/Motherboard/BIOS_Model.aspx?ProductID=3165

Please try to reset the CMOS -
1) Disconnect the power cord from the power supply. Remove the CMOS battery (the flat silver disk) from the motherboard using a srew drive or similar implement. Leave it out for a minute or two, then replace it and power on the system. The BIOS settings should have been reset, allowing the computer to boot.
2) Go into the BIOS – “Load optimized default”
3) Save settings and exit.
4) If this doesn’t work then try “Load Failsafe default”

UUUUGH! Is this automated or are they stupid?

Question – 848338
From : Tom [ gigabyte@bennellick.com ]
Sent : 12/8/2009 20:11
Question : This is not an answer to the question I have asked….
More to the point how am I supposed to know if I have the correct bios update (As you suggest) without the checksum.

So more precisely:
What is the valid checksum in qflash for you bios f4 and f5 on a GA-P55M-UD2(rev. 1.0).
I believe this will be a 4 digit numeric or alphanumeric value…

Regards,

Answer – 848338
Answer : Hi,

We can provide checksum for you but before the providing, please give us more information.

- What is “I was given a checksum by the Qflash utility”? Is that you pressing F8 in bios, entering Qflash menu and get checksum error message or other condition?

- Please also confirm the bios resource. We want to make sure the bioses for this model.

- Also check the original bios on your P55M-UD2. Did you ever flash bios successfully on this motherboard?

Sounds like stalling to me.

Question – 849152
From : Tom [ gigabyte@bennellick.com ]
Sent : 12/10/2009 07:30
Question : I refer to wanting to flash the bios, to the latest version. After the qflash utility[1] has loaded the binary file, extracted from the exe provided on your website[2] the qflash utility gives a 4 digit checksum and asks for confirmation before writing to EEPROM. To make use of this check, one needs to know the correct value.

This is the checksum for the bios firmware, not the variables held in ram.

I enquire about both the f4 and f5 checksums since I have flashed a system to f4 and wish to verify it was correct. Also to flash a further motherboard to f5.

Many thanks,

[1]Accessed by pressing <END> during POST – See p68: http://www.gigabyte.com.tw/Support/Motherboard/Manual_Model.aspx?ProductID=3165#anchor_os

[2] http://www.gigabyte.com.tw/Support/Motherboard/BIOS_Model.aspx?ProductID=3165#anchor_os

Answer – 849152
Answer : Hi,

Here they are:

P55MUD2.F4 – 7400h

P55MUD2.F5 – 2D00h

This took 10 days to get and answer, why cant it just be in the bios download, a text file would do! Also why is the bios in a self extracting .exe file?? Whilst this appears to be a well spec’ed board, I don’t think I will be buying Gigabyte again, I have been generally unimpressed by them in more areas than this.

On Monday (5 days ago) I returned a faulty motherboard to ebuyer and placed and order with farnell. Neither has turned up.

Creamy Camembert:

After a quick, pleasant and polite call to Farnell it turns out that they sent the parts by royal mail(on monday). I shall not digress to express my total disgust at the service we receive from royal mail . Apparently, if you ask for ups delivery in the special requirements box, they will happily not send it royal mail. Further if its a no-show by Monday they will just send the parts again. All this was explained by a bright pleasant lady called Tammy who volunteered her name and extension number.

The Crumbling beige incompetence stained cliffs of Dover (Well East Yorkshire)

Even the expectation of disappointment was not enough to safeguard me from the incompetence that is ebuyer. When I RMA’d the part on-line, I got an email saying I had to phone up a £75-a-second number – what, why? I’ve just written you a short essay in the (tiny) “other” faults box explaining my debug and diagnosis. Turns out I was in for a slightly protracted interview as to weather I had reset the BIOS, amongst other things. After this the bloke on the phone said it would be 3-5 working days, I checked that he meant the whole precess, he said yes. Ah great ill have the replacement by friday (Today).

Yea right, of course the new motherboard is a no-show, what information have I been given? One entry in the “Current returns” section marked “received” So they haven’t even looked at it. Well nothing for it, ill have to call. As expected a short and most exasperating phone call ensued in which the vegetable at the other end of the phone could reveal that they had received it and their policy it 3-5 working days. I pointed out that it was 5 days, (short pause for the chlorophyll mathematics). She re-quoted the 3-5days thing. I politely explain that for them to get it here for today they would have had to dispatch it already. On went the pointless circular discussion until I checked “So you cant give me any more information than that you’ve got it and haven’t sent me a replacement. Yes.
Goodbye.

Farnell can get a part to me faster (even from Belgum) than I can get through on the ebuyer automated telephone system and the postage is cheaper than the phone call. Perhaps they should run an exchange scheme between Farnell and ebuyer, just to show the ebuyer staff quite how incompetent and rude they are, whilst dragging the standard of ebuyer up to a usable standard. After all they are only 39.8 miles apart along a motorway. Not that ebuyer staff could find it, perhaps they could send themselves via the worlds most incompetent carrier, city-link to farnell.

About 5 hours ago gnetlist started crashing when trying to run a drc check:

[tom@beach pcb]$ gnetlist -g drc2 top.sch -o drc_output15.txt
gEDA/gnetlist version 1.4.3.20081231
gEDA/gnetlist comes with ABSOLUTELY NO WARRANTY; see COPYING for more details.
This is free software, and you are welcome to redistribute it under certain
conditions; please see the COPYING file for more details.

Remember to check that your schematic has no errors using the drc2 backend.
You can do it running ‘gnetlist -g drc2 your_schematic.sch -o drc_output.txt’
and seeing the contents of the file drc_output.txt.

Loading schematic [/home/tom/project/logic_analyser/pcb/top.sch]
Backtrace:
In /usr/share/gEDA/scheme/gnet-drc2.scm:
601: 736 (if (not (null? net-conn)) (let* (# # # #) (begin #)) (list))
…
608: 737 [cons "pwr" ...
609: 738* [drc2:get-pintypes-of-net-connections (# # # # ...) ()]
601: 739 (if (not (null? net-conn)) (let* (# # # #) (begin #)) (list))
…
608: 740 [cons "pwr" ...
609: 741* [drc2:get-pintypes-of-net-connections (# # # # ...) ()]
601: 742 (if (not (null? net-conn)) (let* (# # # #) (begin #)) (list))
…
608: 743 [cons "pwr" ...
609: 744* [drc2:get-pintypes-of-net-connections (# # # # ...) ()]
601: 745 (if (not (null? net-conn)) (let* (# # # #) (begin #)) (list))
…
608: 746 [cons "pwr" ...
609: 747* [drc2:get-pintypes-of-net-connections (# # # # ...) ()]
601: 748 (if (not (null? net-conn)) (let* (# # # #) (begin #)) (list))
…
608: 749 [cons "pwr" ...
609: 750* [drc2:get-pintypes-of-net-connections (# # # # ...) ()]
601: 751 (if (not (null? net-conn)) (let* (# # # #) (begin #)) (list))
602: 752 (let* ((element #) (device #) (pin #) …) (begin (cons pintype #)))
604: 753* [car …
604: 754* [cdr …
604: 755* (car net-conn)

/usr/share/gEDA/scheme/gnet-drc2.scm:604:32: In expression (car net-conn):
/usr/share/gEDA/scheme/gnet-drc2.scm:604:32: Stack overflow

some google-ing and trawling the gEDA mailing list revealed that it might have something to do with badly named pin-types. So, its probably one of my newer symbols as I didn’t have this problem a few hours back. So beginning with basic binary division by eye with Emacs, things looked good, chop it in half problem goes away but i could never seem to resolve it.. To cut a long and protracted debug short – ” when running certain larger sized schematics through some of the backends” you get a stack overflow uuurgh, the fix:

add

(debug-options (list ’stack 200000))
(eval-options (list ’stack 200000))

To a gnetlistrc file. All the misery goes away! Yet again a problem that seems so obvious after ive found some mystery obscure part of the gEDA wiki.

Just over a year ago I was briefly involved with the final stages in the deployment of a wireless sensor network. During the project I had many thoughts about how the radio system could have been different. The key problem was that requirements for the comms channel were somewhat unknown. At the time I had recently finished a Software defined Radio project based around the TMS320. Since then, my thoughts have often drifted back to the quandary of just how flexible can you make a radio module for a sensor network. For now I am really considering the physical layer, the network topology is an entirely different kettle of fish.

Not only are there unknowns pre-deployment but things change with time. For example, the channel may change with weather – more water, frozen water, snow cover. Or perhaps physical environment – Increase in (wet?) foliage, change in physical location – node attached to a rock in a landslide? Or a moving animal?? So what if the nodes/data sink could change system variables on the fly to negotiate for optimal communications at minimum power usage? This would of course lead into developing algorithms for choosing what actually is the best at any one time, how much overhead should one invest to optimise the channel….

The requirements initially appear quite simple (Of course not the case when you get into things). The key requirement is low power consumption. This off course relates to output power and data rate. For example, a high power, high data-rate burst may be more cost (power) effective than a longer lower power transmission. Most of the radio systems one sees deployed in commercially available WSN’s are fixed frequency, occasionally offering a choice of output power and modulation. So what are the variables that on might be interested in tinkering with?

• Frequency/Bandwidth – Pretty straightforward, generally lower frequencies are attenuated less per distance through substances – rock, ice, water etc. Higher frequency – greater data rate, smaller antennas
• Modulation – More complex modulation schemes verses resilience to noise.
• Data-rate – maximum a result of other variable choices, although features in Bit error rate somewhat.
• Transmit power – self explanatory really.
• Antenna type/direction/matching – how about a choice of an omni antenna then being able to select one from a choice of increased gain (Directional) antennas? Clearly this is linked to frequency and physical node size

What other physical layers are there? Particularly thinking of non free-space situations. Light, Acoustic wave and Inductive for starters.
Induction has two particularly exciting properties. Unlike EM Waves, its attenuation through water containing media (Eg soil/Ice) remains relatively constant Irrespective of the water/particle size. Secondly, the inductive load of the receiver can be detected, providing the transmitting station some indication of a presence of a receiver.
Even more promising for non-free-space environments is acoustic transmission. Commonly used underwater already, there is already a wealth of research. Unfortunately, little appears to show concern for power consumption. Some numbers plucked from a random paper: 500Kbps over 60m and 4Kbps over 4Km, again this is with unknown power usage. My instinct is that its probably massively too high. More investigation needed.

As a brief aside, one area that remains relatively unexplored to me is that of Wide Band Pulse, It looks quite exciting for this application. Apparently good transmissive properties through walls etc More research needed.

Oven test part 2.
The question I have set about asking is, Is surface tension enough to keep components on the underside of a board whilst it is reheated to solder the top layer.

If your in a hurry: Yes it is.
If you have a few seconds longer, you may like to observe the evidence:

I baked some components onto a bit of gash stripboard (more about this later). It was a good job did this test as i discovered that the solder was all fully melted when the thermometer read about 160degC – really? i was expecting this to be at about the 200degC point. Ok is the thermometer lying? – it was cheap ebay fodder. Cue up the pan of boiling water. This came out at 99devidenceegC so within the tolerances I need. For now I will assume that the discrepancy at high temperature is due to the probe having a greater thermal mass and so lagging in temperature rise.

Step two was to mount the stripboard inverted so the components can fall off under gravity and repeat the heating step. With some solder paste on the top side to verify that a sufficient temperature has been reached, the parts behaved admirably. None have fallen. I pushed the heating step for longer than needed to make sure, this lead to my second discovery of the evening. When over heated, strip-board omits lots of smoke and fumes. Quite disarmingly, burnt stripboard smells of Naan bread! What does this mean, will i be able to eat naan in an Indian again?

In past years, the student robotics hardware has been fabbed by Pcb/Assembly houses. Partly encouraged by the quality of last years results, I decided to undercut the quotes that the companies offered and build the boards myself.
As I will be fitting lots of surface mount components I decided its high time I investigate Reflow ovens, well ovens for reflow. There are a fair few people expressing opinion on what sorts of ovens are acceptable. So where do you buy cheap reflow ovens….. well argos of course! I dropped in on the way back from a job and picked up the cheapest heating enclosure they had – A cookworks desktop oven (423/0285) £20. On first examination, its exactly as expected – Made of badly fitting pressed toffee. In fact its so flimsy one could be excused from mistaking the oven housing for its packaging!

Anyway, to the more important issue, what is its natural temperature profile? Cue up the recently purchased digital oven thermometer, a spreadsheet and a 5 second beeper (watch -n5 xkbbell). The oven was powered on at full power until 230 degrees C. At this point the door was opened and power removed. The results are shown below:

Also on the chart are some recommended warm-up rates and an approximation to the profile suggested by a solder paste datasheet. It seems that the oven is close to the upper limit of commercial reflow ovens(1.5degC/s) and well under the rate the Spark fun guys suggest as a limit (<2.5degC/s). So what is the rate of temperature change. Taking just the linear section of the graph, a line was fitted:

Well it works out at 1.75 degC/s not bad but possibly a little fast. It looks promising for a pretty good profile if the heating is stalled briefly at about 180degC. This delay in the prescribed curve is apparently to let any gasses in the components to escape before the part explodes. So testing in anger with solder tomorrow. Also that question you’ve always wanted to know. Is surface tension enough to stick components to the underside of a board when the topside is being reflowed? More results soon.

This evening I booted my desktop PC and it appeared to hang after logging in. I got black screens (My desktop background is black) and a cursor showing that the computer was busy. Restarting X didn’t help.
I shelled in from my laptop and dmesg was showing some signs of illness:

metacity[3728]: segfault at 0 ip 080aa093 sp bf9af060 error 4 in metacity[8048000+82000]
im-info-daemon[3938]: segfault at 0 ip 0804a325 sp bf98e0b0 error 4 in im-info-daemon[8048000+6000]
im-info-daemon[4062]: segfault at 0 ip 0804a325 sp bfa898f0 error 4 in im-info-daemon[8048000+6000]
im-info-daemon[4146]: segfault at 0 ip 0804a325 sp bf965fc0 error 4 in im-info-daemon[8048000+6000]


I recently updated so thought maybe it was some sort of NVidia incompatibility horror. I tried updating in the hope it may have been fixed already, this highlighted the problem…… My root partition was full.

Simple fix: Delete some stuff. All happy again!

Did anyone else notice a chunk of the Green Wing soundtrack in this weeks Top Gear? Its rather distinctive. I wander if its an doff of the proverbial?

I regularly get told that I am a “geek”, I generally try to take this as a compliment as anything else would hurt too much. But for the first time ever ive thought it of someone else. Im sat in a bar in a very very nice part of oxford and on the table next to me is a bunch of Flow cytometrists (I guess thats what people at a flow cytometry conference are called) getting very excited about a debate that started with Islam and religion but quickly diverted to protein bonding, physiology chairs, fourescines and a whole load of words Ive never heard before Love it!